Included Digital ICs
This document contains a list of all of the logic gates included in the simulator. The pinout and digital behaviour of these devices are designed to replicate the original devices as closely as possible, so you can refer to the original manufacturers' datasheets for further information.
Basic Logic Gates
The following basic logic gates are included:
- 4001 NOR: four NOR gates
- 4011 NAND: four NAND gates
- 4069 NOT: six NOT gates
- 4070 XOR: four XOR gates
- 4071 OR: four OR gates
- 4081 AND: four AND gates
All of the devices containing four logic gates have the same pin functions:
Pin | Function | Pin | Function |
---|---|---|---|
1 | Gate A Input 1 | 14 | Positive Supply |
2 | Gate A Input 2 | 13 | Gate D Input 1 |
3 | Gate A Output | 12 | Gate D Input 2 |
4 | Gate B Output | 11 | Gate D Output |
5 | Gate B Input 2 | 10 | Gate C Output |
6 | Gate B Input 1 | 9 | Gate C Input 2 |
7 | Ground | 8 | Gate C Input 1 |
The 4069, which contains 6 NOT gates, has a different set of pin functions:
Pin | Function | Pin | Function |
---|---|---|---|
1 | Gate A Input | 14 | Positive Supply |
2 | Gate A Output | 13 | Gate F Input |
3 | Gate B Input | 12 | Gate F Output |
4 | Gate B Output | 11 | Gate E Input |
5 | Gate C Input | 10 | Gate E Output |
6 | Gate C Output | 9 | Gate D Input |
7 | Ground | 8 | Gate D Output |
Sequential Devices
4013 D-type Flip Flop
The 4013 IC contains 2 D-type flip flops. Each flip flop has a total of four inputs: set, reset, data and clock; and two outputs: Q and /Q (often written as Q). The output Q is set to the internal state of the device, and /Q is Q inverted.
When the set pin is high, the internal state of the device is set to 1, and when the reset pin is high, the internal state of the device is set to 0. When the clock pin goes from low to high, the internal state of the device is set to the value of the data pin.
The pins of the 4013 are connected as follows:
Pin | Function | Pin | Function |
---|---|---|---|
1 | Gate A Output Q | 14 | Positive Supply |
2 | Gate A Output /Q (Q) | 13 | Gate B Output Q |
3 | Gate A Clock Input (rising edge triggered) | 12 | Gate B Output /Q (Q) |
4 | Gate A Reset Input | 11 | Gate B Clock Input (rising edge triggered) |
5 | Gate A Data Input | 10 | Gate B Reset Input |
6 | Gate A Set Input | 9 | Gate B Data Input |
7 | Ground | 8 | Gate B Set Input |
4017 Decade Counter
The 4017 IC is a decade counter: a counter that counts from 0 to 9 and then returns to 0. It has three inputs: Clock, Inhibit and Reset; 10 decoded counter outputs which represent the current value the counter is at; and a carry output for cascading counters.
The counter value increments every time the clock pin from low to high, provided the inhibit pin is low. When reset is high, the counter value is set to zero and the clock pin will have no effect.
The carry output is low while outputs 5-9 are high and high while outputs 0-4 are high, meaning that one transition occurs every time the counter counts from 0 to 9, so that multiple counters can be connected together.
Pin | Function | Pin | Function |
---|---|---|---|
1 | Output 5 | 16 | Positive Supply |
2 | Output 1 | 15 | Reset |
3 | Output 0 | 14 | Clock |
4 | Output 2 | 13 | Inhibit |
5 | Output 6 | 12 | Carry Out |
6 | Output 7 | 11 | Output 9 |
7 | Output 3 | 10 | Output 4 |
8 | Ground | 9 | Output 8 |
4024 Binary Counter
The 4024 is a 7-bit binary ripple counter: it has 7 binary outputs. It has 2 inputs: clock and reset. When clock goes from high to low, the counter value increments by one, and when the reset input is high the value is set to zero.
Pin | Function | Pin | Function |
---|---|---|---|
1 | Clock | 14 | Positive Supply |
2 | Reset | 13 | Not Connected |
3 | Output 7 (64) | 12 | Output 1 (1) |
4 | Output 6 (32) | 11 | Output 2 (2) |
5 | Output 5 (16) | 10 | Not Connected |
6 | Output 4 (8) | 9 | Output 3 (4) |
7 | Ground | 8 | Not Connected |
Miscellaneous
4511 Display Decoder
The 4511 takes a 4-bit BCD signal as an input (note that only input values 0-9 are valid) and outputs the signals needed to drive a 7-segment display. It also has three control inputs: Lamp Test, Blank and Latch.
When the Lamp Test input goes low, all segments are turned on for test purposes. When the Blank input goes low, all segments are turned off. When the Latch pin goes high, the current input value is stored and changes to the input value will not affect the display until Latch is set back to low again. For normal use, Lamp Test and Blank should be high, and Latch should be low.
Pin | Function | Pin | Function |
---|---|---|---|
1 | B Input (2) | 16 | Positive Supply |
2 | C Input (4) | 15 | Segment f |
3 | Lamp Test | 14 | Segment g |
4 | Blank | 13 | Segment a |
5 | Latch | 12 | Segment b |
6 | D Input (8) | 11 | Segment c |
7 | A Input (1) | 10 | Segment d |
8 | Ground | 9 | Segment e |